Collectively patterned three-dimensionally stacked memories have been proposed to increase the memory capacity of nonvolatile semiconductor memory devices (memory) (for example, refer to JP-A 2007-266143 (Kokai)). According to such a method, it is possible to form a stacked memory collectively regardless of the number of stacks. Therefore, it is possible to suppress cost increases.
In such a collectively patterned three-dimensionally stacked memory, a stacked structural body including insulating films stacked alternately with electrode films forming word lines is formed; and through-holes are made collectively in the stacked structural body. Then, charge storage layers (memory layers) are provided on the side faces of the through-holes; and semiconductor pillars are provided on the inner sides of the charge storage layers. Thereby, memory cells made of, for example, MONOS (Metal Oxide Nitride Oxide Semiconductor) transistors are formed at the intersections between the semiconductor pillars and each of the electrode films.
In the case where the depth of the through-hole is made deeply with respect to the diameter of the through-hole to increase, for example, the memory capacity in such a collectively patterned three-dimensionally stacked memory, the through-hole may be made with a tapered configuration in which the diameter in the lower portion is smaller than in the upper portion. In the case where the through-hole has a tapered configuration, the threshold voltage of the memory cell is different between the upper portion and the lower portion; and operations become unstable. Moreover, in the case where the diameter in the lower portion is reduced, the semiconductor pillar cannot be filled into the interior; and improvement of the bit density is impeded.